Univ. of Aizu

CE Division


  About CE

  CE People


  CE Research



Dr. Toshiaki Miyazaki, Professor

Computer Organization Laboratory

Office: 206-A, Research Quadrangles
Tel: +81-242-37-2572
Email: miyazaki
URL: http://www.u-aizu.ac.jp/~miyazaki/

Education Ph.D. in EE, Tokyo Institute of Technology


Undergraduate Course

  • Computer Organization and Design (2005-)

  • Computer Architecture (2005-)

  • Computer Systems II (2005-2007)

 Graduate Courses

  • Ubiquitous Network Systems and Applications (2008-)
  • Reconfigurable Computing (2006-)

  • Wireless Sensor Networks

  • Reconfigurable and Custom Computing

  • Adaptive Networking Technologies

  • Die-hard Sensor Network (Competitive fund from UoA, 2008-)

  • Development of Wireless Sensor Network for Disaster Monitoring (JST A-STEP, 2010-)

  • Realization of Robust Wireless Sensor Network Having Autonomous Function Repairing Mechanism (Kayamori Foundation of Information Science Advancement,2010-)

  • R. Kawano, and T. Miyazaki, "Simultaneous Optimization for Dynamic Sensor Function Allocation and Effective Sensed Data Aggregation in Wireless Sensor Networks," International Journal of Future Generation Communication and Networking (IJFGCN), Vol.2, No. 4, pp.15-28, Dec. 2009

  • T. Miyazaki, R. Kawano, Y. Endo, and D. Shitara, "A Sensor Network for Surveillance of Disaster-hit Region," Proc. IEEE International Symposium on Wireless and Pervasive Computing (ISWPC2009), pp. 1-6, Melbourne, February 2009.

  • T. Miyazaki, "Boolean Formulation for Sensor Allocation Problem and Its Effective Solver," Proc. ACM/IFIP/USENIX MidSens'06 (International Workshop on Middleware for Sensor Networks), pp. 46-54, Melbourne Australia, Nov. 2006.

  • T. Miyazaki, A. Takahara, T. Murooka, M. Katayama, T. Ichimori, K. Shrakawa, A. Tsutsui, and K. Fukami, ``PROTEUS-Lite Project: Dedicated to Developing a Telecommunication-oriented FPGA and its Applications,'' IEEE Trans. on VLSI Systems, Vol. 8, No. 4, pp.401-414, August 2000.

  • T. Miyazaki (Tanaka), T. Kobayashi and O. Karatsu, ``HARP: Fortran to Silicon,'' IEEE Trans. on CAD, Vol. 8, No. 6, pp.649-660, June 1989.