Univ. of Aizu

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Dr. Tsuneo Tsukahara, Professor

tsuka Computer Logical Design Laboratory

 

Office: 105A, Research Quadrangles

Tel: +81-242-37-2518
Email: tsuka
URL: http://cldlsv1.u-aizu.ac.jp/cldl/index.html


Education Ph.D. in Electronic Engineering, Tohoku University, Japan

Teaching
Courses
  • CSE Labs

  • Electronics

  • Digital Communication Systems

  • Modeling for VLSI Fabrication Technology


Research Interests
  • Design of wireless communication circuits suitable for software-defined radios, WSNs, and WBANs.

  • Design of mixed-signal (or mixed analog/digital) circuits


Recent
Projects
  • 2009-2010: Commissioned Research Fund from ADVANTEST Corporation [March 1, 2010-Feb. 28, 2011]

  • 2011: Cooperative Research Fund from SAMSUNG Yokohama Research Institute


Selected Publications
  • T. Tsukahara, H. Ito, and T. Tsushima, "Evolution of Low-Power CMOS RF Transceivers," 2010 Asia-Pacific Radio Science Conference (AP-RSAC), CBDFK-1, Toyama, Japan, Sept. 2010. [Invited Paper]

  • T. Tsukahara, T. Tsushima, and H. Ito, "Evolution of Transceiver Architectures toward Software-Defined and Cognitive Radios," 2010 Int'l Conference on Solid State Devices and Materials (SSDM), pp. 99-100, Tokyo, Japan, Sept. 2010. [Invited Paper]

  • 束原 恒夫、「CMOS RF回路設計」、丸善、200911月発行.  (T. Tsukahara, “Design of CMOS RF Circuits,” MARUZEN, Nov. 2009.) [ISBN: 978-4-621-08203-4]

  • T. Tsukahara, “RF CMOS Circuits– Overview and Perspective,” 2007 Int’l Conference on Solid State Devices and Materials (SSDM), pp. 752-753, Tsukuba, Japan, Sept. 2007. [Invited Paper

  • M. Ugajin, A. Yamagishi, J. Kodate, M. Harada, and T. Tsukahara, “A 1-V CMOS SOI Bluetooth RF Transceiver Using LC-Tuned and Transistor-Current-Source Folded Circuits,” IEEE J. Solid-State Circuits, vol. 39, no. 4, pp. 569-576, April 2004.